Computer Architecture
525.412

Course Description

This course covers organization, structure, and design of computers, starting with a review of the original Von Neumann machine. Major architectural improvements since 1950 are reviewed, and the contemporary view of multilevel, virtual machines is introduced. Topics include instruction set designs including RISC, addressing, interrupt and trap handling, stacks, data paths control, horizontal and vertical microprogramming, busses, paging, segmentation, and cache. Mapping of twos complement arithmetic onto register level hardware, including simple control units for Booth’s Algorithm and non-restoring division, is also covered.

Syllabus

1. Introduction and background
2. History and heritage
3. Computer instruction sets
4. Transfer of control
5. Adders and arithmetic/logic units
6. Multiplication
7. Microarchitecture
8. MID-TERM EXAMINATION
9. Microprogramming
10. Memory systems
11. Memory management, virtual memory
12. Cache memory management
13. Reduced instruction set computers (RISC)
14. FINAL EXAMINATION

Prerequisites
A senior level course in digital design.

Instructor
Robert C. Moore is a member of the Principal Professional Staff of the Johns Hopkins Applied Physics Laboratory. He is a designer of space flight processors and has 31 years of experience in this field.

E-mail the instructor.

Textbook
Computer Architecture by Jenkins, McMullin, Moore

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Fall 1997