Course Outline
This outline provides an overview of the course and assignments by week. Please remember to check the calendar for specific due dates.
Module |
Week |
Topics |
Assignments |
|
Module 1 |
week 1 |
Review of the classical von Neumann Architecture Classification of Computer Architectures Instruction Set Architecture Hardware System Architecture The Hierarchical View of Computer Systems RISC versus CISC Approaches Computer Performance Metrics |
Read book sections 1.4,1.7-1.9 Review example set 1 |
|
Module 2 |
week 2 |
Internal Data Representation Integer Arithmetic Booth's Algorithm for Multiplication Restoring and Non-restoring Division Algorithms Floating Point operations and data |
Submit problem set 1 Read book sections 2.1 - 2.10, 3.1 - 3.5 Review example Set 2 |
|
Module 3 |
week 4 |
Overview of a RISC Architecture (MIPS) The Digital Logic Level ALU Implementation CPU and Control Unit Implementation The Data Path Hardwired Implementation Single versus Multiple Clock Cycle Implementation |
Submit problem set 2 Read book sections C.1-C.3, C.5-C.7 Review example set 3 |
|
Modules 4&5 |
week 5 |
The Control Unit Microprogrammed Implementation Horizontal versus Vertical Microprogramming Microprogramming Examples Exceptions |
Submit problem set 3 Read book sections 4.1 - 4.4, D.1 - D.6 Review example set 4 |
|
week 6 |
Mid Term Review |
Submit problem set 4 Review Mid-term example problems |
|
|
week 7 |
Mid Term Exam |
Submit Mid-term Exam Review example set 4 |
|
|
Module 6 |
week 8 |
Pipelined Processors Data Pipelining Instruction Pipelining |
Submit problem set 5 Read book sections 4.5 - 4.6 Review example set 6 |
|
Modules 7&8 |
week 9 |
Pipeline Control Hazards Pipeline Data Hazards Multiple Functional Units Superscalar Machines VLIW machines |
Submit problem set 6 Review example set 7 Read book sections 4.7 - 4.10 |
|
Modules 9&10 |
week 10 |
Memory Types Memory Organization Segmentation Banked Memory Interleaved Memory Cache Memory Associative Memory |
Submit problem set 7 Read book sections 5.1 - 5.3 Review example set 8 |
|
Module 11 |
week 11 |
Virtual Memory and Paging |
Submit problem set 8 Read book sections 5.4 - 5.5 Review example set 9 |
|
Modules 12&13 |
week 12 |
The I/O System Direct Programmed Controlled I/O Direct Memory Access Hardware Interrupt Mechanisms System Interconnection and Bus Systems |
Submit problem set 9 Read book sections 6.1 - 6.9 Review example set 10 |
|
Module 14 |
week 13 |
SISD, SIMD and MIMD Machines Parallel Processors Array Processors Vector Processors Clusters Example Machine Architectures |
Submit problem set 10 Read book sections 7.1 - 7.6 |
|
week 14 |
Final Exam Review |
Review final exam example problems |
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week 15 |
Final Exam |
Submit Final Exam |